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Parallel array
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221	Paper formatting guidelines for FPL 2005 proceedings Add to Reading List Source URL: www.automatedtrader.net Language: English - Date: 2008-04-02 15:55:41 Field-programmable gate array Monte Carlo methods in finance Parallel computing Logic simulation Monte Carlo method Accelerator Simulation Hardware description language Digital electronics Electronic engineering Logic design
222	FPGA performances in Cryptography Performance analysis of different cryptographic algorithms implemented in an FPGA Final Report Lubos Gaspar Add to Reading List Source URL: publications.jrc.ec.europa.eu Language: English - Date: 2015-01-23 20:51:10 Electronic engineering OpenCL Field-programmable gate array Altera Parallel computing MD5 Kernel Password cracking Brute-force attack GPGPU Computing Software
223	User Manual for Finite Element and Finite Difference Programs: A Parallel Version of NISTIR-6269 Robert B. Bohn Information Technology Laboratory Edward J. Garboczi Building and Fire Research Laboratory Add to Reading List Source URL: fire.nist.gov Language: English - Date: 2003-12-16 15:59:38 Computer programming Data structures Message Passing Interface Array data structure Parallel computing Computing Application programming interfaces
224	Enforcing Memory Policy Specifications in Reconfigurable Hardware Ted Huffmire , Timothy Sherwood† , Ryan Kastner‡ , and Timothy Levin Naval Postgraduate School Add to Reading List Source URL: www.cisr.us Language: English - Date: 2009-03-04 17:17:27 Electronics Reconfigurable computing Computer engineering Field-programmable gate array Dynamic random-access memory Parallel computing Application-specific integrated circuit Bitstream CPU design Electronic engineering Computer memory Computer hardware
225	A SOFT-CORE PROCESSOR ARCHITECTURE OPTIMISED FOR RADAR SIGNAL PROCESSING APPLICATIONS by René Broich Add to Reading List Source URL: researchspace.csir.co.za Language: English - Date: 2014-09-05 17:55:20 Microprocessors Computer architecture Digital signal processing Integrated circuits Digital electronics Field-programmable gate array Multi-core processor Parallel computing Digital signal processor Electronic engineering Electronics Computer hardware
226	☑ NON-PARTISAN VOTER INFORMATION FORUM October 30, 2014, 11:30 a.m. to 1 p.m. Add to Reading List Source URL: www.csus.edu Language: English - Date: 2014-10-09 12:43:10 Parallel computing California State University Sacramento American Association of State Colleges and Universities Association of Public and Land-Grant Universities Massively parallel processor array
227	Combining I/O Operations for Multiple Array Variables in Parallel NetCDF Kui Gao, Wei-keng Liao, Alok Choudhary Electrical Engineering and Computer Science Department Northwestern University Evanston, IL 60208, USA {kgao Add to Reading List Source URL: cucis.ece.northwestern.edu Language: English - Date: 2010-09-15 16:53:01 Input/output Application programming interfaces Earth sciences graphics software NetCDF Message Passing Interface IBM General Parallel File System Variable Array data type Parallel I/O Computing Parallel computing Data types
228	Using R for Iterative and Incremental Processing Shivaram Venkataraman UC Berkeley [removed] Indrajit Roy Add to Reading List Source URL: www.usenix.org Language: English - Date: 2014-12-06 10:09:07 Parallel computing Distributed computing architecture MapReduce Cloud computing Cloud infrastructure Programming paradigms Sparse matrix Array data type PageRank Computing Computer programming Concurrent computing
229	Parallel Programmability and the Chapel Language∗ Bradford L. Chamberlain∗ , David Callahan† , Hans P. Zima‡ ∗ Cray Inc., Seattle WA, USA, [removed] † Microsoft Corporation, Redmond WA, USA, d.callahan@m Add to Reading List Source URL: psc.informatik.uni-jena.de Language: English - Date: 2007-01-17 08:02:29 Parallel computing Message Passing Interface Co-array Fortran Unified Parallel C Task parallelism Chapel SPMD Parallel programming model Fortran Computing Computer programming Concurrent computing
230	A Parallel 3D Dendritic Growth Simulator using the Phase-Field Method William L. George Mathematical and Computational Sciences Division National Institute of Standards and Technology Gaithersburg MD 20899 Add to Reading List Source URL: www.nist.gov Language: English - Date: 2010-11-24 14:55:10 Parallel computing Array data type Computational science Array data structure Array Lookup table Dendrite Algorithm Stencil codes Computing Computer programming Software engineering

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